debugging period中文是什么意思

發(fā)音:

中文翻譯
造句

調(diào)試時間排除故障時間
早期失效期

debug vt. (-bugged; -bugging) 1.驅(qū)除 ...
period n. 1. 時代；期；時期；期間；階段。 2.〔the ...
debugging 程序調(diào)整; 除去工藝; 堤序; 調(diào)試發(fā)現(xiàn)和去除軟件失效根源的過程。; 調(diào)試來源; 調(diào)試排除故障排除程序中錯誤; 調(diào)諧發(fā)現(xiàn)并排除計算機故障; 故障的排除; 排除錯誤; 消除故障
arithmetic debugging 運算調(diào)試; 運算排錯
asynchronous debugging 異步調(diào)試; 異步排錯
automatic debugging 自動查錯; 自動調(diào)試
automation of debugging 調(diào)試自動化
board debugging 基板調(diào)試
breakpoint debugging 斷點調(diào)試
cabinet debugging 控制臺調(diào)試
connected debugging 對接聯(lián)調(diào)
console debugging 控制臺除錯; 控制臺調(diào)試
control debugging 控制臺調(diào)整
debugging activity 調(diào)試活動
debugging aid 調(diào)試輔助程序; 調(diào)試輔助手段, 調(diào)試工具; 調(diào)試工具
debugging aids 翟輔助程序; 調(diào)試輔助程序; 調(diào)試工具
debugging by backtracking 回溯糾錯
debugging by induction 歸納法糾錯
debugging c c 程序調(diào)試實用手冊
debugging compiler 調(diào)試編譯程序; 調(diào)試編繹程序
debugging efficiency 調(diào)試效率, 調(diào)試效能
debugging event 調(diào)試事件; 偵錯事件
debugging expense 拆卸移動費用; 折卸搬運費用
debugging experiment 糾錯實驗
debugging facility 調(diào)試功能, 調(diào)試勝仗, 調(diào)試措施

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例句與用法

Hydralics monitored findings in the water - pumping debugging period for tgp lock are presented and compared with model test data
摘要介紹了三峽永久船閘抽水調(diào)試階段水力學(xué)監(jiān)測的部分成果，并與模型值進行了比較。
Film laminating sand crust capacity testing instrument researched by tianheng company and mechanical engineering department of tsinghua university enters into final debugging period
天恒公司與清華大學(xué)機械工程系聯(lián)合研制的覆膜砂結(jié)殼性能測定儀進入最后調(diào)試階段！
Second , they only offer a visualized interface of ides , and can only inquire the current state of data object at the breakpoint during debugging period . they do n ' t offer a dynamic view of data object and their relationship and behavior . so , it makes debugging still abstract
第二，只是提供集成環(huán)境的可視化界面，在程序的調(diào)試運行時只能在斷點查詢數(shù)據(jù)對象的當前狀態(tài)，未能提供數(shù)據(jù)對象及其關(guān)系和行為的動態(tài)視圖，使得程序的調(diào)試仍舊不直觀。
With the fast development of the field programmable gate arrays ( fpga ) , the pci ipcore has been offered by a great many manufactories , and then the engineers can integrate the users ’ logic and pci ipcore into the fpga chip , thus the simulations and the verifications of the user ’ logic can be done in the top level . so the engineers can develop pci productions with using ipcore much faster than using special chip of pci interface , and also can shorten debug periods , highly advance the integration of the pcb board
隨著fpga (現(xiàn)場可編程門陣列)技術(shù)的快速發(fā)展,很多制造廠商都開始提供pci接口核邏輯( ipcore ) ,設(shè)計者可以將pci用戶邏輯和pci核邏輯集成到fpga里面,并且可以在頂層通過仿真來驗證pci接口以及用戶邏輯設(shè)計的正確與否,這樣較之使用那些pci專用接口芯片,使用ipcore就可以大幅度的提高調(diào)試速度,縮短開發(fā)周期,提高電路板的集成度和系統(tǒng)的性能。

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